Restarting semiconductor studies in the AI era
 |
Description
Book Introduction
A map of the future of semiconductors from best-selling author Jeong In-seong, author of "The Future of the Semiconductor Empire"!
In the era of the mobile revolution and artificial intelligence, opportunities lie in semiconductors.
From the advent of mobile devices to the AI revolution, IT innovation continues to surprise us.
Smartphones have been increasing their functionality every year since their first appearance, and artificial intelligence has even become capable of speaking and drawing like humans.
Behind these advancements are semiconductors that have been providing higher capacity and faster performance every year.
Smartphones came with APs and the semiconductor packaging technology that made them possible, while artificial intelligence like ChatGPT came with two types of semiconductors: GPUs and HBM.
The problem, however, is that Moore's Law and Dennard Scaling, which have supported the competitiveness of semiconductors, no longer work well.
So how can semiconductors overcome this crisis? Semiconductors now require innovation of a completely different level than before.
As we continue to innovate in manufacturing processes that make semiconductor devices ever finer, we are also demanding unprecedented attempts, including advanced packaging that stacks multiple manufactured chips in three dimensions, new standards such as CXL and PIM, and even collaboration with software development and platform companies.
This book examines the challenges of semiconductor miniaturization that have arisen throughout the evolution of IT technology, from the advent of computers to mobile devices and artificial intelligence, from three perspectives: what they are and how they have been overcome.
1.
From bottom to top
We examine how the challenges of miniaturization have been overcome through the introduction of new equipment, improvements in manufacturing processes, three-dimensional stacking of devices, and backside metal wiring layers.
2.
From inside to outside
We explore how products made with new semiconductor packaging technologies like AP and HBM have overcome the challenges of semiconductor miniaturization and become partners in the massive innovations of the IT industry, such as mobile and artificial intelligence.
3.
Out of the factory
We explore a new level of effort to overcome challenges that are difficult to solve with manufacturing and packaging technologies, using technologies such as CXL and PIM that require collaboration with semiconductor customers.
Miniaturization has become a challenge that cannot be solved by semiconductor companies alone.
Therefore, this book predicts that new collaborations between semiconductor manufacturing companies and software and platform companies are essential.
Through this book, readers will understand the background of the numerous semiconductor technologies and terms currently in use, as well as the true meaning of each term.
Furthermore, you will gain the ability to view IT innovation and new semiconductor technologies together.
As the mobile and AI revolutions accelerate, I recommend this book to readers who want to understand the essence of the semiconductor industry and explore its opportunities.
In the era of the mobile revolution and artificial intelligence, opportunities lie in semiconductors.
From the advent of mobile devices to the AI revolution, IT innovation continues to surprise us.
Smartphones have been increasing their functionality every year since their first appearance, and artificial intelligence has even become capable of speaking and drawing like humans.
Behind these advancements are semiconductors that have been providing higher capacity and faster performance every year.
Smartphones came with APs and the semiconductor packaging technology that made them possible, while artificial intelligence like ChatGPT came with two types of semiconductors: GPUs and HBM.
The problem, however, is that Moore's Law and Dennard Scaling, which have supported the competitiveness of semiconductors, no longer work well.
So how can semiconductors overcome this crisis? Semiconductors now require innovation of a completely different level than before.
As we continue to innovate in manufacturing processes that make semiconductor devices ever finer, we are also demanding unprecedented attempts, including advanced packaging that stacks multiple manufactured chips in three dimensions, new standards such as CXL and PIM, and even collaboration with software development and platform companies.
This book examines the challenges of semiconductor miniaturization that have arisen throughout the evolution of IT technology, from the advent of computers to mobile devices and artificial intelligence, from three perspectives: what they are and how they have been overcome.
1.
From bottom to top
We examine how the challenges of miniaturization have been overcome through the introduction of new equipment, improvements in manufacturing processes, three-dimensional stacking of devices, and backside metal wiring layers.
2.
From inside to outside
We explore how products made with new semiconductor packaging technologies like AP and HBM have overcome the challenges of semiconductor miniaturization and become partners in the massive innovations of the IT industry, such as mobile and artificial intelligence.
3.
Out of the factory
We explore a new level of effort to overcome challenges that are difficult to solve with manufacturing and packaging technologies, using technologies such as CXL and PIM that require collaboration with semiconductor customers.
Miniaturization has become a challenge that cannot be solved by semiconductor companies alone.
Therefore, this book predicts that new collaborations between semiconductor manufacturing companies and software and platform companies are essential.
Through this book, readers will understand the background of the numerous semiconductor technologies and terms currently in use, as well as the true meaning of each term.
Furthermore, you will gain the ability to view IT innovation and new semiconductor technologies together.
As the mobile and AI revolutions accelerate, I recommend this book to readers who want to understand the essence of the semiconductor industry and explore its opportunities.
- You can preview some of the book's contents.
Preview
index
Prologue: A Semiconductor Journey from Bottom to Top
Chapter 1: The Moore Era
01.
Software and Computers
Software, the human dream
Computers, the tools that make dreams come true
02.
Transistors and Computers, a Blessing for Humanity
The Bricks of Computer Components: Transistors
The Two Blessings of Semiconductor Manufacturing: Moore and Dennard
First Winners: CPUs, DRAM, and NAND Flash
03.
semiconductor manufacturing
semiconductor design
Semiconductor manufacturing (all processes)
Semiconductor packaging (post-processing)
Various semiconductor business models
Chapter 2: Progress in Micronization and the Challenges of Semiconductor Manufacturing
01.
The Cruelty of Exposure: The Difficulty of Drawing Patterns
A brief history of exposure
The Emergence of EUV and the Challenges for Manufacturing Companies
A Future Without New Light Sources: High-NA
02.
Hello Dennard: Semiconductors that don't work well even when drawn small
A closer look at transistor operation
Quantum effects and leakage current
Chapter 3: From Bottom to Top: Overcoming Challenges Throughout the Process
01.
The method of miniaturization of the entire process
Summary of Device Layer Technology Applications
Disposable density boosters, density and performance
02.
The Device Layer Challenge: Making Tiny Transistors
High-quality materials to strengthen the gate: High-k Metal Gate
Widening the effective channel width: FinFET, gate-all-around (nanosheet)
Increasing the Effective Distance of DRAM Channels: Recessed Channel
Limits of DRAM Scaling and Device Stacking: Vertical Channel
3Dizing Unit Storage: 3D NAND and 3D DRAM
03.
The Metal Wiring Problem: Connecting Components
Problems that miniaturization causes in metal wiring
New wiring materials: aluminum, copper, and then
Soldering the Microscopic World: Contact
Blocking current with a thin insulating film: low-k
Backside of the wafer: Backside power delivery (BSPDN)
04.
Making Semiconductors with Unimproved Components: Design and Scaling
Refinement and Data Defects: Error Correction Codes
Physical Security Vulnerabilities Caused by Micronization: Rowhammer
Manufacturing with Design Firms: DTCO
Buffering for High-Density and High-Performance Manufacturing: Cache Memory
If you can't drive fast, drive wide: GDDR and HBM
Chapter 4: The War Outside the Process: Packaging
01.
The emergence of new packaging
Packaging Terms and Meanings
A Packaging Perspective: Space Utilization and Wiring Efficiency
The #1 Contributor to the Golden Age of Packaging: Mobile
02.
Advances in packaging element technology
Narrowing Wiring Distances: From Wire Bonding to Flip Chip
Increasing Wiring Density: Toward Better Package Substrates
Joining components: lead frames (pins), balls, bumps
Between the front-end process and packaging: the redistribution layer
Using Multiple Chips Together: Die Stacking and PoP
Increased productivity and package size: Wafer-level packaging, fan-in, and fan-out
03.
Various packaging examples
Big improvements from a simple idea: flip chips and CPUs
Combining two highly interactive chips: multi-chip packaging
Cost-Effective Multi-Chip Packaging: Wire Bonding and Die Stacking
The Battle Against Thickness: Mobile APs and Package-on-Package
New Packaging for Mobile Memory: Vertical Fan-Out (VFO) and Vertical Copper Pillar Stack (VCS)
Chapter 5: The Whole Process Coming Out to the Outside World: 3D and 2.5D Packaging
01.
With full process technology
Advanced Packaging Terms and Their Meanings
Limitations of Process Refinement and Packaging
02.
Key Element Technologies for 3D and 2.5D Packaging
Wire bonding implemented using full-process technology: TSV
The Ultimate Evolution of Balls and Bumps: Hybrid Bonding
Wafers that Replace Substrates: Silicon Interposers
Only the advantages of substrates and silicon interposers: silicon bridges
03.
Examples of various 3D packaging products
Improving Manufacturing Efficiency: 3D Stacking of NAND Flash and Chips
New Products in Packaging: AMD's 3D V-Cache
Connectivity for space savings and high-density connections: HBM
Active Interposer + Packaging Comprehensive Set: Lakefield
04.
Examples of various 2.5-dimensional packaging products
Accelerator built with 2.5-dimensional packaging: NVIDIA A100
AI Accelerator with CPU: AMD MI300A
The Limits of Cost-Effective Packaging: Intel Sapphire Rapids
Chapter 6: Out of the Package: Dedicated Semiconductors, a New Concept
01. GPU, NPU, TPU: Roles and Implementation
02. CXL: Improvements through New Standards
03. PIM: Memory that aims to redefine the definition of a computer
Chapter 7: Changing the Perspective: Semiconductors as Seen by Users
01.
The low-power, high-density trend brought about by mobile devices
02.
High-performance semiconductors revolutionized by artificial neural networks
conclusion
01.
The challenges of micronization: disposable boosters, three-dimensionalization
02.
The semiconductor industry is moving beyond factories
Chapter 1: The Moore Era
01.
Software and Computers
Software, the human dream
Computers, the tools that make dreams come true
02.
Transistors and Computers, a Blessing for Humanity
The Bricks of Computer Components: Transistors
The Two Blessings of Semiconductor Manufacturing: Moore and Dennard
First Winners: CPUs, DRAM, and NAND Flash
03.
semiconductor manufacturing
semiconductor design
Semiconductor manufacturing (all processes)
Semiconductor packaging (post-processing)
Various semiconductor business models
Chapter 2: Progress in Micronization and the Challenges of Semiconductor Manufacturing
01.
The Cruelty of Exposure: The Difficulty of Drawing Patterns
A brief history of exposure
The Emergence of EUV and the Challenges for Manufacturing Companies
A Future Without New Light Sources: High-NA
02.
Hello Dennard: Semiconductors that don't work well even when drawn small
A closer look at transistor operation
Quantum effects and leakage current
Chapter 3: From Bottom to Top: Overcoming Challenges Throughout the Process
01.
The method of miniaturization of the entire process
Summary of Device Layer Technology Applications
Disposable density boosters, density and performance
02.
The Device Layer Challenge: Making Tiny Transistors
High-quality materials to strengthen the gate: High-k Metal Gate
Widening the effective channel width: FinFET, gate-all-around (nanosheet)
Increasing the Effective Distance of DRAM Channels: Recessed Channel
Limits of DRAM Scaling and Device Stacking: Vertical Channel
3Dizing Unit Storage: 3D NAND and 3D DRAM
03.
The Metal Wiring Problem: Connecting Components
Problems that miniaturization causes in metal wiring
New wiring materials: aluminum, copper, and then
Soldering the Microscopic World: Contact
Blocking current with a thin insulating film: low-k
Backside of the wafer: Backside power delivery (BSPDN)
04.
Making Semiconductors with Unimproved Components: Design and Scaling
Refinement and Data Defects: Error Correction Codes
Physical Security Vulnerabilities Caused by Micronization: Rowhammer
Manufacturing with Design Firms: DTCO
Buffering for High-Density and High-Performance Manufacturing: Cache Memory
If you can't drive fast, drive wide: GDDR and HBM
Chapter 4: The War Outside the Process: Packaging
01.
The emergence of new packaging
Packaging Terms and Meanings
A Packaging Perspective: Space Utilization and Wiring Efficiency
The #1 Contributor to the Golden Age of Packaging: Mobile
02.
Advances in packaging element technology
Narrowing Wiring Distances: From Wire Bonding to Flip Chip
Increasing Wiring Density: Toward Better Package Substrates
Joining components: lead frames (pins), balls, bumps
Between the front-end process and packaging: the redistribution layer
Using Multiple Chips Together: Die Stacking and PoP
Increased productivity and package size: Wafer-level packaging, fan-in, and fan-out
03.
Various packaging examples
Big improvements from a simple idea: flip chips and CPUs
Combining two highly interactive chips: multi-chip packaging
Cost-Effective Multi-Chip Packaging: Wire Bonding and Die Stacking
The Battle Against Thickness: Mobile APs and Package-on-Package
New Packaging for Mobile Memory: Vertical Fan-Out (VFO) and Vertical Copper Pillar Stack (VCS)
Chapter 5: The Whole Process Coming Out to the Outside World: 3D and 2.5D Packaging
01.
With full process technology
Advanced Packaging Terms and Their Meanings
Limitations of Process Refinement and Packaging
02.
Key Element Technologies for 3D and 2.5D Packaging
Wire bonding implemented using full-process technology: TSV
The Ultimate Evolution of Balls and Bumps: Hybrid Bonding
Wafers that Replace Substrates: Silicon Interposers
Only the advantages of substrates and silicon interposers: silicon bridges
03.
Examples of various 3D packaging products
Improving Manufacturing Efficiency: 3D Stacking of NAND Flash and Chips
New Products in Packaging: AMD's 3D V-Cache
Connectivity for space savings and high-density connections: HBM
Active Interposer + Packaging Comprehensive Set: Lakefield
04.
Examples of various 2.5-dimensional packaging products
Accelerator built with 2.5-dimensional packaging: NVIDIA A100
AI Accelerator with CPU: AMD MI300A
The Limits of Cost-Effective Packaging: Intel Sapphire Rapids
Chapter 6: Out of the Package: Dedicated Semiconductors, a New Concept
01. GPU, NPU, TPU: Roles and Implementation
02. CXL: Improvements through New Standards
03. PIM: Memory that aims to redefine the definition of a computer
Chapter 7: Changing the Perspective: Semiconductors as Seen by Users
01.
The low-power, high-density trend brought about by mobile devices
02.
High-performance semiconductors revolutionized by artificial neural networks
conclusion
01.
The challenges of micronization: disposable boosters, three-dimensionalization
02.
The semiconductor industry is moving beyond factories
Detailed image
Into the book
The semiconductor industry is a business that uses semiconductor manufacturing equipment to manufacture smaller, more efficient components at lower costs, and then connects them with metal wiring to ultimately produce better computer components such as processing devices and storage devices.
Semiconductor companies develop new products and earn more revenue from computer companies, and people who buy new, high-performance computers can run existing programs faster or run programs they couldn't run before.
Some of the added value generated in this way flows back to semiconductor companies in the form of sales, leading to additional investments in miniaturization, creating a virtuous cycle that fosters growth in the semiconductor industry and, by extension, the IT industry.
In other words, if we cannot create smaller and more efficient devices, this virtuous cycle will be broken.
--- p.61
Semiconductor miniaturization affects not only channel width but also channel length.
As the distance between the source and drain, which are the two ends of the transistor channel, gets closer every year due to miniaturization, the short channel effect, one of the quantum effects, begins to increase.
The single-channel effect is a phenomenon in which current flows between the source and drain even when the gate is closed.
We previously discussed leakage current between the gate and channel in high-k metal gate technology, but it is helpful to understand the single-channel effect as the same phenomenon occurring between the source and drain.
Of course, this is also an unavoidable physical phenomenon that occurs when making smaller transistors.
--- p.112
Wire bonding and die stacking are the oldest semiconductor packaging technologies, but they are also the last to survive in the semiconductor market.
The older the technology, the higher its reliability and stability. Furthermore, its simple structure means lower manufacturing costs, making it a particularly good match for memory semiconductors, which have a low price per unit area.
Wire bonding and die stacking will always be around as long as the concept of computers itself continues to exist.
--- p.212
As smartphones became a necessity of life, users began to demand more from them.
The most important demands among them were high performance and increased battery life.
This is like asking for a car that can carry twice as much cargo but gets better fuel economy.
To meet this demand, smartphone manufacturers have had to replace key components with lower-power ones.
Unsurprisingly, the products that consumed the most power were the smartphone's processing unit, the AP, and the storage unit, the memory.
These two components had to be power efficient.
Another important challenge was to save physical space by incorporating small components into the device.
This is because a smaller space requires more batteries as well as more sensors, such as GPS and NFC for contactless payments.
Semiconductor companies develop new products and earn more revenue from computer companies, and people who buy new, high-performance computers can run existing programs faster or run programs they couldn't run before.
Some of the added value generated in this way flows back to semiconductor companies in the form of sales, leading to additional investments in miniaturization, creating a virtuous cycle that fosters growth in the semiconductor industry and, by extension, the IT industry.
In other words, if we cannot create smaller and more efficient devices, this virtuous cycle will be broken.
--- p.61
Semiconductor miniaturization affects not only channel width but also channel length.
As the distance between the source and drain, which are the two ends of the transistor channel, gets closer every year due to miniaturization, the short channel effect, one of the quantum effects, begins to increase.
The single-channel effect is a phenomenon in which current flows between the source and drain even when the gate is closed.
We previously discussed leakage current between the gate and channel in high-k metal gate technology, but it is helpful to understand the single-channel effect as the same phenomenon occurring between the source and drain.
Of course, this is also an unavoidable physical phenomenon that occurs when making smaller transistors.
--- p.112
Wire bonding and die stacking are the oldest semiconductor packaging technologies, but they are also the last to survive in the semiconductor market.
The older the technology, the higher its reliability and stability. Furthermore, its simple structure means lower manufacturing costs, making it a particularly good match for memory semiconductors, which have a low price per unit area.
Wire bonding and die stacking will always be around as long as the concept of computers itself continues to exist.
--- p.212
As smartphones became a necessity of life, users began to demand more from them.
The most important demands among them were high performance and increased battery life.
This is like asking for a car that can carry twice as much cargo but gets better fuel economy.
To meet this demand, smartphone manufacturers have had to replace key components with lower-power ones.
Unsurprisingly, the products that consumed the most power were the smartphone's processing unit, the AP, and the storage unit, the memory.
These two components had to be power efficient.
Another important challenge was to save physical space by incorporating small components into the device.
This is because a smaller space requires more batteries as well as more sensors, such as GPS and NFC for contactless payments.
--- p.312
Publisher's Review
In the era of the mobile revolution and AI, semiconductor technologies are evolving beyond the limits of miniaturization to the emergence of AI.
Behind the advancements in mobile and artificial intelligence that astonish us every day are semiconductors that have been providing higher capacity and faster performance every year.
And the reason semiconductors were able to support IT development in this way was thanks to Moore's Law, which states that 'the number of transistors integrated into a semiconductor chip doubles approximately every two years', and Dennard Scaling, which states that 'as the size of a transistor decreases, power consumption also decreases proportionally'.
These two principles have been the axes that support the competitiveness of semiconductors that are 'smaller, faster, and consume less power.'
However, as mobile and artificial intelligence developments accelerate, semiconductors must become smaller, faster, and consume less power.
The problem is that Moore's Law and Dennard Scaling, which have supported the competitiveness of semiconductors, are no longer working well.
How can semiconductors overcome this crisis?
Semiconductors now require innovation on a different level than before.
As we continue to innovate in manufacturing processes that make semiconductor devices ever finer, we are also demanding unprecedented attempts, including advanced packaging that stacks multiple manufactured chips in three dimensions, new standards such as CXL and PIM, and even collaboration with software development and platform companies.
Through this book, readers will understand the challenges of semiconductor miniaturization that have arisen throughout the development of IT technology, from the birth of computers to mobile devices and artificial intelligence, and the level of effort being made to overcome them.
And you will understand the background of the emergence of numerous semiconductor technologies and terms that are flooding the market every year, such as GPU, HBM, NPU, CXL, GAA, and PIM, and the true meaning of each term, and you will come to properly understand the background of their emergence.
Additionally, you will gain insight into IT innovation and new semiconductor technologies.
As the mobile and AI revolutions accelerate, I recommend this book to readers who want to understand the essence of the semiconductor industry and explore its opportunities.
Behind the advancements in mobile and artificial intelligence that astonish us every day are semiconductors that have been providing higher capacity and faster performance every year.
And the reason semiconductors were able to support IT development in this way was thanks to Moore's Law, which states that 'the number of transistors integrated into a semiconductor chip doubles approximately every two years', and Dennard Scaling, which states that 'as the size of a transistor decreases, power consumption also decreases proportionally'.
These two principles have been the axes that support the competitiveness of semiconductors that are 'smaller, faster, and consume less power.'
However, as mobile and artificial intelligence developments accelerate, semiconductors must become smaller, faster, and consume less power.
The problem is that Moore's Law and Dennard Scaling, which have supported the competitiveness of semiconductors, are no longer working well.
How can semiconductors overcome this crisis?
Semiconductors now require innovation on a different level than before.
As we continue to innovate in manufacturing processes that make semiconductor devices ever finer, we are also demanding unprecedented attempts, including advanced packaging that stacks multiple manufactured chips in three dimensions, new standards such as CXL and PIM, and even collaboration with software development and platform companies.
Through this book, readers will understand the challenges of semiconductor miniaturization that have arisen throughout the development of IT technology, from the birth of computers to mobile devices and artificial intelligence, and the level of effort being made to overcome them.
And you will understand the background of the emergence of numerous semiconductor technologies and terms that are flooding the market every year, such as GPU, HBM, NPU, CXL, GAA, and PIM, and the true meaning of each term, and you will come to properly understand the background of their emergence.
Additionally, you will gain insight into IT innovation and new semiconductor technologies.
As the mobile and AI revolutions accelerate, I recommend this book to readers who want to understand the essence of the semiconductor industry and explore its opportunities.
GOODS SPECIFICS
- Date of issue: November 10, 2025
- Page count, weight, size: 340 pages | 560g | 152*225*20mm
- ISBN13: 9791199072978
- ISBN10: 1199072974
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