Chapter 01.
Digital System
1.1 Digital and Analog
1.2 Bit, Byte, and Word
1.3 Numbers
1.4 Switching Devices
1.5 Logic Gates
1.6 Logic Levels
1.7 CMOS
1.8 FPGAs and ASICs

Chapter 02.
Boolean Algebra
2.1 Axiom
2.2 Theorem
2.3 DeMorgan Theorem
2.4 Boolean Equation
2.5 Karnaugh Map

Chapter 03.
Verilog HDL
3.1 Introduction
3.2 Basic Grammar
3.3 Operators
3.4 Module Connection (Instantiation)
3.5 Level of Modeling
3.6 Testbench
3.7 System Task

Chapter 04.
Combinational Logic
4.1 Gates
4.2 Module
4.3 Combinational Logic Design
4.4 Data Transmission Combination Circuit (Data Logic)
4.5 Arithmetic Logic
4.6 Combination Circuit Test Bench

Chapter 05.
Sequential Logic
5.1 Memory
5.2 Blocking and Non-blocking
5.3 Synchronous Sequential Logic
5.4 FSM (Finite State Machine)
5.5 FMS Technology Method (FSM Design)
5.6 Traffic Signal Controller (FSM)
5.7 Shift Register
5.8 Summary of Verilog HDL Description Methods

Chapter 06.
Timing
6.1 Combinational Logic Timing
6.2 Sequential Logic Timing
6.3 Input/Output Format and Timing (Critical Path)
6.4 Delay in Verilog HDL

Chapter 07. Digital System Design Using IC
7.1 Things to know before practicing (Basics)
7.2 Segment Decoder Design
7.3 2-bit Down Counter Design
7.4 Vending Machine Controller Design
7.5 Summary of Digital Circuit Design Using ICs

Chapter 08.
Digital System Design using Verilog HDL
8.1 Segment Decoder Design
8.2 Verilog HDL Simulation
8.3 FPGA Circuit Implementation
8.4 Segment Display Controller Design (Display Controller)
8.5 Stopwatch Design
8.6 ALU Design (Arithmetic Logic Unit)
8.7 UART Design (Universal Asynchronous Receiver and Transmitter)
8.8 UART Design Using Shift Registers
8.9 Microprocessor Design

supplement.
Practice Board Manual (User Manual)
1. SPL-Lab100 Board Overview
2.
General User Input/Output

Chapter 1 describes the digital system.
Defines binary digits, bits, bytes, and words in digital systems, and introduces switching elements and AND, OR, and NOT gates.
Understand the logic levels that distinguish between logical values ​​1 and 0, and learn about the characteristics of gates implemented in CMOS technology.
Finally, we will discuss FPGAs and ASICs.
Chapter 2 briefly describes Boolean algebra used in digital systems.
Define axioms and understand the properties of theorems using gate circuits.
We introduce a method to express truth tables as logical formulas in SOP and POS format, and Kano maps that can simplify logical formulas.
Chapter 3 introduces Verilog HDL and its basic syntax.
We will cover how to define modules and input/output, how to represent data, how to use supported operators, how to connect multiple modules, and modeling methods.
Additionally, we describe how to write a test bench to verify a circuit described using Verilog HDL.
Let's look at some system tasks that can be useful when verifying designs.

Chapter 4 explains combinational logic with Verilog HDL code.
First, we will look at the behavioral and structural description methods of simple combinational circuits using gates.
We introduce the characteristics of assign and always used in combinational circuit technology, and the description method of if-else and case statements.
Describes the operation of multiplexer, encoder, and decoder circuits frequently used in digital system design and describes them in Verilog HDL.
Explains the principles of arithmetic operation circuits such as half adders, full adders, carry look-ahead adders, and prefix adders.
Finally, we introduce how to create a test bench for a combinational circuit.
Chapter 5 explains sequential logic with Verilog HDL code.
First, we introduce the memory elements that are essential for sequential circuits.
Understand the difference between non-blocking and blocking representation methods that must be taken into account in sequential circuit technology using hardware synthesis results.
We will learn about synchronous sequential circuits and explain the design process of FSM, a representative synchronous sequential circuit, using counter and traffic light controller FSM designs.
Additionally, we introduce Verilog HDL code that is convenient to use for FSM technology.
Finally, we will look at the operation of frequently used shift registers and their Verilog HDL code.
Chapter 6 explains the timing of combinational and sequential circuits.
We define propagation delay and contamination delay, and learn about glitches.
This section explains how to determine the operating frequency of a synchronous sequential circuit and how to account for setup and hold time violations.
We explain what to consider when designing circuits based on their output formats and introduce how to express time delays in Verilog HDL.
In Chapter 7, we design a segment decoder, a counter, and a vending machine FSM using gates and a breadboard.
Verify the functionality of your designed circuit by plugging the IC into a breadboard and connecting it with wires.
I hope that through this hands-on experience, you will be able to understand the characteristics of the hardware.
Understand the concurrency of hardware, where multiple ICs operate on a breadboard and the gates and flip-flops built inside all operate simultaneously.
In Chapter 8, we describe hardware using Verilog HDL and verify the described code through simulation.
Additionally, we introduce the process of implementing functionally verified Verilog HDL code on an FPGA.
Describe the segment decoder circuit in Verilog HDL.
We introduce the simulation method using Modelsim and the implementation process on Intel's FPGA using the Quartus II program.
We design a display controller circuit to drive six segments and reuse this circuit in the stopwatch design.
Design and implement the ALU, a component of the processor, and the UART transceiver circuit, which is the basic communication channel.
Finally, we reuse the circuit we designed to implement a simple microprocessor.

Verilog HDL has many convenient commands and usage methods in addition to those described in this book.
However, beginners and novice users can sufficiently describe digital circuits using only the material presented in this book.
Familiarizing yourself with the material in this book may require a bit more typing, but it will allow you to write Verilog HDL code in a good coding style.
Verilog HDL is a language for describing hardware in which all components operate simultaneously.
Good coding style is code that shows the structure of the hardware well while reducing the possibility of mistakes.


Although Verilog HDL supports many commands and usage methods, beginners and beginners are encouraged to describe hardware using only the material covered in this book.
When designing many semiconductors, including processors, digital signal processors (DSPs), communication semiconductors, display semiconductors, image and voice recognition semiconductors, and artificial intelligence semiconductors, you can sufficiently design circuits using only the Verilog HDL technology methods mentioned in this book.
All chips are manufactured and functioning using this technology.
When you describe hardware using Verilog HDL using a computer, it's important to remember that you're describing hardware that operates concurrently, not programming software.


Feeling the need for a Verilog HDL book for digital circuit design, I started writing the book I had been putting off.
The author has tried to explain a mistake-free Verilog HDL coding method based on his design experience at companies such as Intel and Broadcom, his research experience at the Korea Electronics Technology Institute, and his teaching experience at Seoul National University of Science and Technology.
We've made every effort to correct typos and bugs, but if you find any that still exist, please let us know.


I hope this book will help beginners who are starting hardware design using Verilog HDL take their first steps as digital circuit designers.