
Semiconductor packaging and testing for the AI era
Description
Book Introduction
In the AI era, where data usage is rapidly increasing, the importance of various advanced semiconductor packaging technologies such as stacking, heterogeneous integration, and system-in-package (SiP) is growing.
In particular, HBM (High Bandwidth Memory) and its TSV stacking technology, chiplet and hybrid bonding, and interposer technology are becoming pack-sim technologies for advanced semiconductor packages.
In particular, HBM (High Bandwidth Memory) and its TSV stacking technology, chiplet and hybrid bonding, and interposer technology are becoming pack-sim technologies for advanced semiconductor packages.
index
Chapter 01 Definition and Role of Semiconductor Packages
1.
Semiconductor post-processing
2.
Definition of semiconductor package
3.
The role of semiconductor packages
4.
Development trends in semiconductor packages
5.
Semiconductor package development work process and duties
Chapter 02 Types of Semiconductor Packages
1.
Classification of semiconductor packages
2.
Conventional Package
3.
Wafer-level package
4.
laminated package
5.
System in Package
Chapter 03 Package Design and Analysis
1.
Semiconductor package design
2.
structural analysis
3.
Thermal analysis
4.
Electrical interpretation
Chapter 04 Conventional Packaging Process
1.
Conventional packaging process sequence
2.
Back grinding
3.
Wafer cutting
4.
Die Attach
5.
Interconnection
6.
Molding
7.
Mark King
8.
Solder ball mounting
9.
Singulation
Chapter 05 Wafer-Level Packaging Process
1.
Wafer-level packaging process sequence
2.
Photo process
3.
sputtering process
4.
electroplating process
5.
Wet process - PR strip and metal etching
6.
Fan-in WLCSP process
7.
Flip chip bump process
8.
Rewiring process
9.
Fan-out WLCSP process
10.
Silicon through-electrode packaging process
11.
Measurement and Inspection
Chapter 06 Semiconductor Package Materials
1.
Raw materials and auxiliary materials
2.
lead frame
3.
Substrate
4.
adhesive
5.
Epoxy molding compound
6.
Solder
7.
streamer
8.
wire
9.
packaging materials
10.
photoresist
11.
Plating solution
12. PR Stripper
13.
etchant
14.
sputter target
15.
Underfill
16.
Carrier, adhesive, and mounting tape
Chapter 07 Semiconductor Testing
1.
Semiconductor Testing Overview
2.
Wafer testing
3.
Package Testing
4. HBM Test
Chapter 08 Semiconductor Package Reliability
1.
The meaning of reliability
2. JEDEC standards
3.
Life reliability test
4.
Environmental reliability testing
5.
Mechanical reliability testing
1.
Semiconductor post-processing
2.
Definition of semiconductor package
3.
The role of semiconductor packages
4.
Development trends in semiconductor packages
5.
Semiconductor package development work process and duties
Chapter 02 Types of Semiconductor Packages
1.
Classification of semiconductor packages
2.
Conventional Package
3.
Wafer-level package
4.
laminated package
5.
System in Package
Chapter 03 Package Design and Analysis
1.
Semiconductor package design
2.
structural analysis
3.
Thermal analysis
4.
Electrical interpretation
Chapter 04 Conventional Packaging Process
1.
Conventional packaging process sequence
2.
Back grinding
3.
Wafer cutting
4.
Die Attach
5.
Interconnection
6.
Molding
7.
Mark King
8.
Solder ball mounting
9.
Singulation
Chapter 05 Wafer-Level Packaging Process
1.
Wafer-level packaging process sequence
2.
Photo process
3.
sputtering process
4.
electroplating process
5.
Wet process - PR strip and metal etching
6.
Fan-in WLCSP process
7.
Flip chip bump process
8.
Rewiring process
9.
Fan-out WLCSP process
10.
Silicon through-electrode packaging process
11.
Measurement and Inspection
Chapter 06 Semiconductor Package Materials
1.
Raw materials and auxiliary materials
2.
lead frame
3.
Substrate
4.
adhesive
5.
Epoxy molding compound
6.
Solder
7.
streamer
8.
wire
9.
packaging materials
10.
photoresist
11.
Plating solution
12. PR Stripper
13.
etchant
14.
sputter target
15.
Underfill
16.
Carrier, adhesive, and mounting tape
Chapter 07 Semiconductor Testing
1.
Semiconductor Testing Overview
2.
Wafer testing
3.
Package Testing
4. HBM Test
Chapter 08 Semiconductor Package Reliability
1.
The meaning of reliability
2. JEDEC standards
3.
Life reliability test
4.
Environmental reliability testing
5.
Mechanical reliability testing
Detailed image
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GOODS SPECIFICS
- Date of issue: October 25, 2024
- Page count, weight, size: 208 pages | 175*245*11mm
- ISBN13: 9791166475016
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